Commercial off the Shelf Direct Digital Synthesizers for Digital Array

Sine Approximation for Direct Digital Frequency Synthesizers and Function Generators

There are several compression methods for phase to amplitude converter for sine function. In this paper, the linear and parabolic approximation of equi-section division utilizing the symmetry property and amplitude approximation of a sinusoidal waveform for direct digital frequency synthesizer (DDS) and also for other waveform applications, e.g. function generators and telecommunication devices...

Cryocooled wideband digital channelizing radio-frequency receiver based on low-pass ADC

We have demonstrated a digital receiver performing direct digitization of radio-frequency signals over a wide frequency range from kilohertz to gigahertz. The complete system, consisting of a cryopackaged superconductor all-digital receiver (ADR) chip followed by room-temperature interface electronics and a field programmable gate array (FPGA) based post-processing module, has been developed. T...

Digital Radio High Performance Digital Down - Converters for FPGAs 48 Virtex FPGAs surpass off - the - shelf ASSPs in design flexibility and system integration

Design and Implementation of Field Programmable Gate Array Based Baseband Processor for Passive Radio Frequency Identification Tag (TECHNICAL NOTE)

In this paper, an Ultra High Frequency (UHF) base band processor for a passive tag is presented. It proposes a Radio Frequency Identification (RFID) tag digital base band architecture which is compatible with the EPC C C2/ISO18000-6B protocol. Several design approaches such as clock gating technique, clock strobe design and clock management are used. In order to reduce the area Decimal Matrix C...

Overcoming the Challenges of Simulating Phased-Array Radar Systems

operations, as well as to achieve higher resolution and better detection performance. Despite these enviable benefits, when developing phased-array radar many issues may be encountered. For modern engineers, that often means a myriad of test challenges, not the least of which is finding a way to improve performance while also reducing the high cost associated with Transmit/Receive (T/R) modules...